AMD quad-core processor, courtesy of AMD Class meets Monday and Wednesday: 16.15 – 18.00 in room H.206
Friday classes will be held as needed in room H.206 (16:15 – 18:00) to make up in case of instructor's absence during regular class meeting times.


 
H&P: Computer Architecture, 4th Edition

Course textbook: Hennessy and Patterson, Computer Architecture, A Quantitative Approach, 4th Edition. Available in Greek (Tziolas publishers, translation by D. Pnevmatikatos, D. Serpanos and G. Stamoulis). ISBN 9789604180769.

Additional reading: Shen and Lipasti, Modern Processor Design, Fundamentals of Superscalar Processors, McGraw Hill, 2005, ISBN 0-07-059033-8.

Additional reading material will be posted as needed, during classes. Reading material includes Chapters from other textbooks (in English) and technical papers from conferences or journals covering the field of Computer Architecture.

Suggested Material:
Free online MOOC on edX: Computer System Design: Improving Energy Efficiency and Performance - Starts 1st Nov. 2016
"Learn the elements of computer design needed for programmers to make the most of computers' speed and to write energy-effective programs."
by Prof. Per Stenström - Chalmers University of Technology

Course Personnel
Instructor(s) Teaching Assistant(s)
Dr. Vassilis Papaefstathiou Dimitris Giannopoulos
Dr. Iakovos Mavroidis
Prof. Manolis Katevenis

Class Topic Slides Reading list Assignments
19 Sep. Welcome and introduction Slides Chapter 1 (1.1-1.3) from course textbook
21 Sep. Metrics Slides Chapter 1 (1.4-1.12) from course textbook
30 Sep. Pipelining review Slides Appendix A (A.1-A.3) from course textbook
03 Oct. Pipelining review Slides from 30 Sep. Homework 1
Deadline: 15 Oct. 23:59
Deadline: 17 Oct. 23:59
07 Oct. Dynamic scheduling with Scoreboard Slides Section 2.1, Appendix A (A.5, A.7,A.8) from course textbook
12 Oct. Dynamic scheduling with Scoreboard Slides from 07 Oct. CDC 6600 original scoreboard design paper
14 Oct. Dynamic scheduling with Tomasulo Slides Chapter 2 (2.4,2.5) from course textbook
19 Oct. Dynamic scheduling with Tomasulo Slides from 14 Oct. Tomasulo's original paper
21 Oct. ILP and Static scheduling Slides Section 2.2, Appendix G(G.1-G.3) from course textbook Homework 2
Deadline: 02 Nov. 23:59
Deadline: 04 Nov. 23:59
24 Oct. Branch prediction Slides Sections 2.3, 2.9 (pages 121-126), Appendix G(G.4) from course textbook.
Alternative implementations of two-level adaptive branch predictors
26 Oct. Precise Exceptions and Speculation Slides Appendix A(A.4), Section 2.6, Section 2.9 (pages 127-129) from course textbook
31 Oct. Precise Exceptions and Speculation Slides from 26 Oct. Prog. Assignment 1
Deadline: 13 Nov. 23:59
Deadline: 20 Nov. 23:59
02 Nov. Multiple issue processors
(Superscalar and VLIW)
Slides Sections 2.7, 2.8, Appendix G.3(G-19 to G-21), Appendix G.6
Limits of Instruction-Level Parallelism, David Wall
16 Nov. Midterm Examination Mandatory (20%) All lectures up to Branch Prediction (inclusive)
21 Nov. Multiple issue processors
(Superscalar and VLIW)
Slides from 2 Nov.
23 Nov. Thread-Level Parallelism (TLP) Slides Sections 3.5, 3.6,
Simultaneous Multithreading: Maximizing On-Chip Parallelism, Tullsen et. al
Power5 System Microarchitecture, Sinharoy et. al
Homework 3
Deadline: 05 Dec. 23:59
Deadline: 07 Dec. 23:59
28 Nov. Cache memories:
Design and performance analysis
Slides Section 5.1, Appendix C.1
30 Nov. Cache memories Handouts from 28 Nov.
02 Dec. Cache design optimizations Slides Appendix C.2, Section 5.2
07 Dec. Cache design optimizations Handouts from 2 Dec.
09 Dec. Virtual memory Slides Appendix C.4 Prog. Assignment 2
Deadline: 05 Jan. 23:59
12 Dec. Multi-core Processors (Basics) Slides Chapter 4
14 Dec. Snoop-based Cache Coherence Slides Chapter 4
16 Dec. Main Memory Slides Chapter 7, Sections 7.1–7.5, from textbook Memory Systems: Cache, DRAM, Disk, by Bruce Jacob, Spencer W. Ng, and David T. Wang


Websites from previous years:


V. Papaefstathiou, I. Mavroidis - Last update: 28 Nov. 2016