Department of Computer Science
,
University of Crete
, Greece
CS-534: Packet Switch Architecture
Fall 2001
Manolis Katevenis
Course Description
Lecture Transparencies and Reading Material:
This year:
0. Introduction, Link Types
1. Circuit Switching
2. Basic Switching Notions, Switch Generations
3. Buffer Memory Technologies and Architectures
4. Switch Queueing Architectures and Crossbar Scheduling
5. Switching Fabric Topologies
7. Output Scheduling for QoS
Previous year:
5. Switching Fabric Topologies
6. Routing Table Lookup and Flow Classification Hardware: See
Reading List
[8]-[10]
8. Flow Control, Switching Fabrics with Internal Backpressure
Bibliography
(draft, constantly evolving!)
Schedule of Lectures
Exercises:
Exercise set 1
(due week 2 --01 Oct. 2001): Rate and throughput calculations.
Exercise set 2
(due week 3 --08 Oct. 2001): TST circuit switch scheduling.
Exercise set 3
(due week 4 --15 Oct. 2001): Internal blocking, cut-through, switch generations.
Exercise set 4
(due week 5 --22 Oct. 2001): RAM access rate, packet segment rate.
Exercise set 5
(due week 6 --31 Oct. 2001): Multi-queue memories using linked lists.
Exercise set 6
(due week 7 --09 Nov. 2001): Linked-list queue management.
Exercise set 7
(due week 9 --19 Nov. 2001): Queueing Architecture SRAM Cost.
Exercise set 8
(due week 10 --26 Nov. 2001): Input Queueing and Crossbar Scheduling.
Exercise set 9
(due week 11 --05 Dec. 2001): Output Scheduling for QoS.
Exercise set 10
(due week 12 --14 Dec. 2001): Switching Fabric Topologies.
Exercise set 11
(due week F --14 Jan. 2002): Flow control, per-flow queueing.
Reading Assignments
: papers to be read and orally presented in class by individual students.
Previous Years:
Spring 2000 and previous semesters
.
© copyright University of Crete, Greece. Last updated: 15 Jan. 2002 by
M. Katevenis
.