Dept. of Computer Science, University of Crete.
CS-534: Packet Switch Architecture

3. Switch Generations & Buffer Memory Architectures

*** VERY DRAFT !!! ***

M. Katevenis, P. Vatsolaki, A. Efthymiou: "Pipelined Memory Shared Buffer for VLSI Switches", Proc. ACM SIGCOMM '95 Conference, Cambridge, MA USA, Aug. 1995, pp. 39-48; gziped Postscript (81 KB). Also see a demo (annimation) at http://archvlsi.ics.forth.gr/demos.html.