CS-534: Packet Switch Architecture Spring 2003

Department of Computer Science © University of Crete, Greece

Reading Assignments: per-student papers
Oral Presentations: Wednesday 4 June, 11-5, White Bldg. Room B-212

Each student in the class is assigned a paper --or a set of closely related papers-- and has to orally teach its main ideas (that we haven't seen in class) to the rest of us. Each student has 20 minutes to do that, plus 5 minutes for questions and answers. The schedule of presentations/teaching is given below.

You can use the blackboard (whiteboard), or hand-written transparencies, or machine-printed transparencies, or machine-projected transparencies as teaching aid. Note that machine-generated transparencies are not necessarily better than hand-written transparencies (when you write in a clean, orderly way), and that transparencies are not necessarily better than blackboard (whiteboard), when it comes to better teaching an idea. Either way, you are discouraged from photocopying (or scanning) figures from the paper that you want to present, and then mechanically reciting ("apaggelia"/"papagalia") what the paper says without trying to extract its main idea(s) and teach that (these) to us.... Last but not least, it is a well known fact that it is impossible to fit the entire contents of a paper in a half-hour slot: you need to make a selection of the most important point(s), and only try to teach those to us.

Papers and Schedule:

11:15 - 11:35  -  IP Address Lookup etc. - Vassilis Poursalidis

11:45 - 12:05  -  Flow Classification etc. - Vassilis Papaefstathiou
Selection of ideas among e.g.:

• IEEE Network Magazine, March-April 2001: a collection of 3 articles on the topic:
  • P. Gupta, N. McKeown: "Algorithms for Packet Classification", pp. 24-32 (looks more detailed and more recent than previous articles of theirs, incl. IEEE Micro of Jan-Feb. 2000 and perhaps SIGCOMM'99).
  • PMC-Sierra, pp. 33-41 (describes a hardware architecture)
  • M. Ruiz-Sanchez, E. Biersack, W. Dabbous: "Survey and Taxonomy of IP Address Lookup Algorithms", pp. 8-23 (detailed; mostly tree-based longest-prefix algorithms).
• M. O'Connor, C. Gomez (Silicon Access Networks): "The iFlow Address Processor", IEEE Micro Magazine, March-April 2001, pp. 16-23.
• D. Shah, P. Gupta: "Fast Updating Algorithms for Ternary CAM's", IEEE Micro, Jan.-Feb. 2001, pp. 36-47.
• T. Lakshman, D. Stiliadis: "High-Speed Policy-based Packet Forwarding using Efficient Multi-Dimensional Range Matching", ACM SIGCOMM '98 Conference, Vancouver, BC, Canada, Sept. 1998, pp. 203-214.

12:15 - 12:35  -  Optical Burst Switching - Christoforos Adamakis

• C. Qiao: "Labeled Optical Burst Switching for IP-over-WDM Integration", IEEE Communications Magazine, vol. 38, no. 9, Sep. 2000, pp. 104-114.
• S. Verma, H. Chaskar, R. Ravikanth: "Optical Burst Switching: a Viable Solution for Terabit IP Backbone", IEEE Network Magazine, vol. 14, no. 6, Nov./Dec. 2000, pp. 48-53.
• I. Baldine, G. Rouskas, H. Perros, D. Stevenson: "JumpStart: a Just-in-Time Signaling Architecture for WDM Burst-Switched Networks", IEEE Communications Magazine, vol. 40, no. 2, Feb. 2002, pp. 82-89.

12:45 - 13:05  -  Inverse Multiplexing and Packet Resequencing - Chara Athanasopoulou

• F. Chiussi, D. Khotimsky, S. Krishnan: "Generalized inverse multiplexing for switched ATM connections", Proc. IEEE GLOBECOM Conf., Sydney, Australia, Nov 1998, pp. 3134-3140; available on-line through Bell Labs Data Networking Systems Research in .ps format.
• D. Khotimsky: "A packet resequencing protocol for fault-tolerant multipath transmission with non-uniform traffic splitting", Proc. IEEE GLOBECOM Conf., Rio de Janeiro, Brasil, Dec 1999, pp. 1283-1289; available on-line through Bell Labs Data Networking Systems Research in .ps format.

13:15 - 13:35  -  Scheduling Algorithms - Panagiotis Perros

• Hui Zhang: "Service Disciplines For Guaranteed Performance Service in Packet-Switching Networks", Proceedings of the IEEE, vol. 83, no. 10, October 1995; available on line through http://www-2.cs.cmu.edu/People/hzhang/publications.html in ps.gz or in pdf.

13:45 - 14:30  -  Lunch Break

14:30 - 14:50  -  Deadlock-Freedom, etc. - Dokianaki/Evaggelatou

15:00 - 15:20  -  Routing Algorithms etc. - Evaggelatou/Dokianaki

• Selection from 2 chapters from: Jose Duato, S. Yalamanchili, L. Ni: "Interconnection Networks: an Engineering Approach" Morgan Kaufmann Publishers, 2002 (or newer edition in 2003?), ISBN 1-55860-852-4 www.mkp.com/books_catalog/catalog.asp?ISBN=1-55860-852-4

15:30 - 15:50  -  Processor-Memory Interconnection Switches - Chariton Melissaris

• A. Charlesworth: "The SUN Fireplane Interconnect", IEEE Micro Magazine, vol. 22, no. 1, Jan./Feb. 2002, pp. 36-45.
• S. Mukherjee e.a.: "The ALPHA 21364 Network Architecture", IEEE Micro Magazine, vol. 22, no. 1, Jan./Feb. 2002, pp. 26-35.

16:00 - 16:20  -  Power Consumption in Switches - Dimitrios Simos

• H-S. Wang, L-S. Peh, S. Malik: "A Power Model for Routers: Modeling Alpha 21364 and Infiniband Routers", IEEE Micro Magazine, vol. 23, no. 1, Jan./Feb. 2003, pp. 26-35.

16:30 - 16:50  -  High-End Byte-Sliced Switch - Euriklis Kounalakis

• F. Abel, C. Minkenberg, R. Luijten, M. Gusat, I. Iliadis: "A Four-Terabit Packet Switch Supporting Long Round-Trip Times", IEEE Micro Magazine, vol. 23, no. 1, Jan./Feb. 2003, pp. 10-24.

17:00  -  Adjourn

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