Area: | Hardware and Computer Systems (E4) |
Description: | Performance metrics, pipelining and hazards, dynamic instruction scheduling with scoreboard and Tomasulo, ILP and static instruction scheduling, branch prediction, precise exceptions, speculation, multiple issue out-of-order superscalar processors, VLIW processors, thread level paralellism and multithreaded processors, multi-level cache memories and design optimizations, virtual memory and TLBs, multicore processors, snoop-based cache coherence, memory consistency, DRAM main memory technologies. |
ECTS: | 6 |
Prerequisites: | CS225 Computer Organization |
Mailing-list: | hy425-list at csd dot uoc dot gr |