AMD quad-core processor, courtesy of AMD Class meets Monday, Wednesday, 09.15–11.00 in room Rho Alpha 203 (white buildings, Knossos campus). Friday classes scheduled only on an as needed basis, in the event of instructor's absence during regular class meeting times.

Midterm scheduled on Monday, Nov. 9, 09:15-11:00 in class (Rho Alpha 203).

H&P: Computer Architecture, 3rd Edition
Course textbook: Hennessy and Patterson, Computer Architecture, A Quantitative Approach, 3rd Edition. Available in Greek (Tziolas publishers, translation by D. Pnevmatikatos, D. Serpanos and G. Stamoulis). ISBN 9789604180769.

Additional reading: Shen and Lipasti, Modern Processor Design, Fundamentals of Superscalar Processors, McGraw Hill, 2005, ISBN 0-07-059033-8.
Additional reading material will be posted as needed, during classes. Reading material includes Chapters from other textbooks (in English) and technical papers from conferences or journals covering the field of Computer Architecture.

lectures notes of 25/11
Class Topic Slides Reading listAssignments
21/9 Welcome and introduction Slides,handout 2up, handout 4up, updated on Sep 21, 15:24 Chapter 1 from course textbook
23/9 No class
25/9 Pipelining review Slides,handout 2up, handout 4up, updated on Sep 25, 12:30 Appendix A, A.1–A.3 from course textbook Homework 1, updated Sep 25, 08:39
28/9 Hazards Handout on 25/9 Appendix A, A.4 from course textbook
30/9 ILP and instruction schedulingSlides, handout 2up, handout 4up, updated on Oct. 06, 10:50Chapter 3, section 3.1 from course textbook
7/10 Dynamic scheduling with scoreboardHandout of 30/9Chapter 3, section 3.2–3.3 from course textbook, CDC 6600 original scoreboard design paper
9/10 Dynamic scheduling with Tomasulo's algorithmSlides, handout 2up, handout 4up, updated on Nov. 03, 22:15Tomasulo's original paper Homework 2, updated Oct 12, 09:00
12/10 Branch prediction (static,dynamic) Slides, handout 2up, handout 4up, updated on Oct. 14, 12:37Chapter 3, Section 3.4 from course textbook
14/10 Branch prediction (correlation, jumps)Handout on 12/10Chapter 3, Sections 3.4–3.5 from course textbook, Alternative implementations of two-level adaptive branch predictors Machine Assignment 1, updated Oct 24, 13:00
19/10 Multiple issue processors (statically and dynamically scheduled) Slides, handout 2up, handout 4up, updated on Oct. 19, 11:35Chapter 3, Section 3.6 from course textbook, Chapter 5, Section 5.1 from book “Modern Processor Design: Fundamentals of Superscalar Processors”, by Lipasti and Shen
26/10 No class
31/10 SpeculationSlides, handout 2up, handout 4up, updated on Oct. 31, 22:15Chapter 3, Section 3.7 from course textbook, Chapter 5, Sections 5.2–5.3 from book “Modern Processor Design: Fundamentals of Superscalar Processors”, by Lipasti and Shen
2/11 Limits of ILPSlides, handout 2up, handout 4up, updated on Nov. 4, 12:02Chapter 3, Sections 3.8–3.10 from course textbook, Limits of Instruction-Level Parallelism, by David Wall, WRL Research Report 93/6
4/11 Software techniques for ILP: Static scheduling and VLIW Slides, handout 2up, handout 4up, updated on Nov. 4, 12:02Chapter 4, Sections 4.1–4.3 from course textbook Homework 3, updated Nov 15, 20:00
9/11 Midterm exam
13/11 Software pipelining. Introduction to vector processorsSlides, handout 2up, handout 4up, updated on Nov. 23, 21:22 reading material from previous lecture, Appendix F from book Computer Architecture: A Quantitative Approach, Fourth Edition, by Hennessy and Patterson
16/11 No class
18/11 No class
23/11 Vector processorslecture notes of 13/11 reading material from previous lecture, Appendix F from book Computer Architecture: A Quantitative Approach, Fourth Edition, by Hennessy and Patterson
25/11 Simultaneous multithreadingSlides, handout 2up, handout 4up, updated on Nov. 27, 15:33 Chapter 3, Section 3.5, from textbook Computer Architecture: A Quantitative Approach, Fourth Edition, by Hennessy and Patterson, Simultaneous Multithreading: Maximizing On-Chip Parallelism, Tullsen, Eggers and Levy, ISCA95
27/11 Simultaneous multithreadinglecture notes of 25/11 reading material from previous lecture, Power5 System Microarchitecture, Sinharoy et. al, IBM Journal of Research and Development, 49(4–5), September 2005.
30/11 Cache memories: Design and performance analysisSlides, handout 2up, handout 4up, updated on Dec. 2, 18:56 Chapter 5, Sections 5.1–5.3, from textbook Computer Architecture: A Quantitative Approach, Third Edition, by Hennessy and Patterson
2/12 No class
4/12 Cache memories: Design optimizationSlides, handout 2up, handout 4up, updated on Dec. 9, 17:51 Chapter 5, Sections 5.4–5.7, from textbook Computer Architecture: A Quantitative Approach, Third Edition, by Hennessy and Patterson Homework 4, updated 6/12, 19:53
9/12 Cache memories: Design optimization, software transformations for localitylecture notes from 4/12 Chapter 5, Section 5.3, from textbook Computer Architecture: A Quantitative Approach, Second Edition, by Hennessy and Patterson
11/12 Cache memories: Non-blocking caches and prefetchingSlides, handout 2up, handout 4up, updated on Dec. 15, 14:07 Chapter 3, Sections 3.1–3.3, from textbook Memory Systems: Cache, DRAM, Disk, by Bruce Jacob, Spencer W. Ng, and David T. Wang
14/12 DRAM TechnologiesSlides, handout 2up, handout 4up, updated on Dec. 15, 14:00 Chapter 7, Sections 7.1–7.5, from textbook Memory Systems: Cache, DRAM, Disk, by Bruce Jacob, Spencer W. Ng, and David T. Wang Machine Assignment 2, updated 16/12, 10:00
16/12 Mulitprocessor ArchitecturesSlides, handout 2up, handout 4up, updated on Jan. 5 2010, 15:07 Chapter 6, Sections 6.1–6.2, from textbook Computer Architecture: A Quantitative Approach, Third Edition
18/12 Snooping Coherence ProtocolsSlides, handout 2up, handout 4up, updated on Jan. 5 2010, 15:07 Chapter 6, Section 6.3 from textbook Computer Architecture: A Quantitative Approach, Third Edition

Assign Date Assignment Due Date
25/09/2009 Homework Set 1, updated on Sep 25, 08:39 Due: 01/10/2009 - 23:59
12/10/2009 Homework Set 2, updated on Oct 12, 09:00 Due: 19/10/2009 - 23:59
24/10/2009 Machine Assignment 1, updated on Oct 24, 13:00 Due: 06/11/2009 - 23:59
15/11/2009 Homework Set 3, updated on Nov 15, 20:00 Due: 22/11/2009 - 23:59
06/12/2009 Homework Set 4, updated on Dec 6, 19:53 Due: 11/12/2009 - 23:59
16/12/2009 Machine Assignment 2, updated on Dec 16, 10:00 Due: 08/01/2010 - 23:59


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